Two-dimensional (2D) semiconducting materials have gained significant attention in the field of optoelectronics due to their unique properties that could potentially revolutionize the development of ultra-thin and tunable electronic components. Despite their promising advantages over traditional bulk semiconductors, achieving optimal performance by interfacing these materials with gate dielectrics has been a significant challenge. This issue often results in the formation of interfacial traps that degrade the performance of transistors.
Researchers at King Abdullah University of Science and Technology (KAUST), in collaboration with Soochow University and other institutes globally, recently proposed a novel approach to enhance the fabrication of high-performance transistors based on 2D semiconductors. The research, published in Nature Electronics, introduced the use of hexagonal boron nitride (h-BN) dielectrics and metal gate electrodes with a high cohesive energy as key components in the transistor design. Through extensive experimentation, the team found that using platinum (Pt) as an anode significantly reduced dielectric breakdown in h-BN stacks, leading to 500-times lower leakage current compared to gold (Au) electrodes.
The researchers, led by Yaqing Shen and Prof. Mario Lanza, fabricated over 1,000 devices using chemical vapor deposited h-BN as dielectrics. The team discovered that h-BN gate dielectrics demonstrated optimal compatibility with high cohesive energy metals, such as platinum and tungsten (W). To create transistors with a vertical Pt/h-BN/MoS2 structure, the team initiated the fabrication process by cleaning a SiO2/Si substrate and patterning the source and drain electrodes (Ti/Au) using electron beam lithography. Subsequently, MoS2 was exfoliated from a natural crystal and transferred onto the electrodes to form the channel. A CVD h-BN film was then transferred over the structure through a wet transfer method.
In the final step of transistor fabrication, the researchers patterned the Pt gate electrode using electron beam lithography and deposited it using e-beam evaporation. The strong van der Waals interface between MoS2 and h-BN in the transistor design improved reliability and performance by minimizing defects and enhancing gate control. Contrary to the belief that CVD h-BN is an ineffective gate dielectric, the team’s findings demonstrated that selecting the appropriate metal electrodes, such as Pt and W, can enable the effective use of h-BN in field-effect transistors with MoS2 channels. The clean van der Waals interface between MoS2 and h-BN enhances the reliability and performance of the transistor structure.
The novel approach developed by Shen and her colleagues has shown promising results by reducing leakage currents and achieving a high dielectric strength of at least 25 MV cm-1 in the transistors. Initial tests indicated that Pt and W-based gate electrodes significantly decreased the leakage current across h-BN dielectrics compared to Au electrodes. This breakthrough research could pave the way for the utilization of 2D materials in the fabrication of solid-state microelectronic circuits and devices. Furthermore, the findings may inspire other research groups to explore similar approaches and materials, leading to the development of highly performing 2D semiconductor-based devices. As the next step in their research, the team plans to focus on developing ultra-small, fully 2D transistors to contribute to the advancement of Moore’s Law in the semiconductor industry.
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